1. Field of the Invention
The present invention relates to image processing and, more particularly, to the scaling of binary images.
2. Description of the Prior Art
A digital image may be created in a variety of ways including raster scanning a hardcopy document, using an image editor to create a line drawing, using a video frame grabber to capture a frame of a video signal, and so on. The resulting digital image is characterized as binary or continuous tone, as in a gray-scale or color image. Of particular importance to the present invention are binary images which are internally represented in a computer by bit-maps that may be optically perceived as pixels.
There has been much work in the field of image processing to efficiently transform an image by resampling. By resampling an image, a higher or lower resolution image can be made from an existing image. Sampling is the term used for the initial converting of an analog image into a digital image. When an image is resampled, the image may also be rescaled in size by reduction or enlargement. For example, a user of a computer aided design (CAD) system who desires to focus in on a particular feature of a large engineering drawing will use a zoom-in operation to enlarge the selected feature. During the zoom-in operation, the image is resampled to provide an enlarged view of the area of interest.
Unfortunately, the scaling or rescaling of an image carries with it a high computational burden. In fact, the problem of processing video images in real-time has resulted in the design of highly specialized image co-processors such as the TMC2301 image resampling sequencer available from TRW LSI Products. Others, such as Tabata, et al., ("High-Speed Image Scaling for Integrated Document Management", 2nd ACM-SIGOA Conference on Office Information, Jun. 25-27, 1984), have developed designs for sophisticated computer hardware to scale an image. Of course, such specialized hardware can be expensive.
The image scaling design of Tabata, et al., assumes that a scale factor is a rational number of the form M/N, where N is small (16 or 32). A table is constructed with N elements, each containing interpolation coefficients that are used to generate a single pixel by interpolating between the four source pixels that surround the point being resampled. The design is primarily directed to continuous tone images.
Another specialized processor for image scaling is disclosed by Suzuki, et al., ("A Single Chip Bit-Mapped Image Processor, MN8617", National Computer Conference Proceedings, 1985, pp. 279-286). The Suzuki, et al., processor provides word boundary alignment by the use of two barrel shifters. A mapping vector, determined concurrently with the scaling, is used to scale an input image. In addition, the scaling factor is restricted to be a rational number.
Thus, there is now a need for an inexpensive high speed image scaler that can be implemented on a conventional computer without additional specialized hardware. In addition, the image scaler should not be limited to scaling by rational scale factors. Moreover, the desired image scaler should not be overly complicated for an application to binary images. Finally, as the process of scaling binary images has included traditional inefficiencies associated with bit manipulations, what is now desired is an image scaler that can essentially align the input and output bits on specific memory boundaries, such as words, so as to provide more efficient processing.